View OP97FSZ-REEL7_4306222.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

low power, high precision operational amplifier op97 rev. g information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?1997C2009 analog devices, inc. all rights reserved. null null v+ ?in features low supply current: 600 a maximum op07 type performance offset voltage: 20 v maximum offset voltage drift: 0.6 v/c maximum very low bias current 25c: 100 pa maximum ?55c to +125c: 250 pa maximum high common-mode rejection: 114 db minimum extended industrial temperature range: ?40c to +85c pin connections 00299-001 v? +in out over comp 1 2 3 4 8 7 6 5 op97 figure 1. 8-lead pdip (p suffix) 8-lead soic (s suffix) general description the op97 is a low power alternative to the industry-standard op07 precision amplifier. the op97 maintains the standards of performance set by the op07 while utilizing only 600 a supply current, less than 1/6 that of an op07. offset voltage is an ultralow 25 v, and drift over temperature is below 0.6 v/c. external offset trimming is not required in the majority of circuits. improvements have been made over op07 specifications in several areas. notable is bias current, which remains below 250 pa over the full military temperature range. the op97 is ideal for use in precision long-term integrators or sample-and- hold circuits that must operate at elevated temperatures. common-mode rejection and power supply rejection are also improved with the op97, at 114 db minimum over wider ranges of common-mode or supply voltage. outstanding psr, a supply range specified from 2.25 v to 20 v, and the minimal power requirements of the op97 combine to make the op97 a preferred device for portable and battery-powered instruments. the op97 conforms to the op07 pinout, with the null potenti- ometer connected between pin 1 and pin 8 with the wiper to v+. the op97 upgrades circuit designs using ad725, op05, op07, op12, and pm1012 type amplifiers. it may replace 741- type amplifiers in circuits without nulling or where the nulling circuitry has been removed.
op97 rev. g | page 2 of 16 table of contents features .............................................................................................. 1 ? pin connections ............................................................................... 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical characteristics ............................................................. 3 ? absolute maximum ratings ............................................................ 5 ? thermal resistance ...................................................................... 5 ? esd caution...................................................................................5 ? typical performance characteristics ..............................................6 ? application information ................................................................ 11 ? ac performance ............................................................................. 12 ? guarding and shielding ................................................................. 13 ? outline dimensions ....................................................................... 15 ? ordering guide .......................................................................... 16 ? revision history 3/09rev. f to rev. g changes to figure 20 and figure 23 ............................................... 9 changes to figure 26 and figure 27 ............................................. 10 updated outline dimensions ....................................................... 15 changes to ordering guide .......................................................... 16 11/07rev. e to rev. f updated format .................................................................. universal changes to ordering guide .......................................................... 16 07/03rev. d to rev. e deleted h-08a .................................................................... universal deleted q-8 ......................................................................... universal deleted e-20a ..................................................................... universal deleted die characteristics ............................................................. 4 deleted wafer test limits ............................................................... 4 updated tpc 14 ............................................................................... 5 updated outline dimensions ....................................................... 10 01/02rev. c to rev. d edits to absolute maximum ratings .............................................. 3 edits to ordering guide ................................................................... 3 deleted dice characteristics .......................................................... 3 deleted wafer test limits ................................................................ 3 edits to applications information ................................................... 7
op97 rev. g | page 3 of 16 specifications electrical characteristics v s = 15 v, v cm = 0 v, t a = 25c, unless otherwise noted. table 1. op97e op97f parameter symbol conditions min typ max min typ max unit input characteristics input offset voltage v os 10 25 30 75 v long-term offset voltage stability v os /time 0.3 0.3 v/month input offset current i os 30 100 30 150 pa input bias current i b 30 100 30 150 pa input noise voltage e n p-p 0.1 hz to 10 hz 0.5 0.5 v p-p input noise voltage density e n f o = 10 hz 1 17 30 17 30 nv/hz f o = 1000 hz 2 14 22 14 22 nv/hz input noise current density i n f o = 10 hz 20 20 fa/hz large signal voltage gain a vo v o = 10 v; r l = 2 k 300 2000 200 2000 v/mv common-mode rejection cmr v cm = 13.5 v 114 132 110 132 db input voltage range 3 ivr 13.5 14.0 13.5 14.0 v output characteristics output voltage swing v o r l = 10 k 13 14 13 14 v differential input resistance 4 r in 30 30 m power supply power supply rejection psr v s = 2 v to 20 v 114 132 110 132 db supply current i sy 380 600 380 600 a supply voltage v s operating range 2 15 20 2 15 20 v dynamic performance slew rate sr 0.1 0.2 0.1 0.2 v/s closed-loop bandwidth bw a vcl = 1 0.4 0.9 0.4 0.9 mhz 1 10 hz noise voltage density is s ample tested. devices 100% tested for noise are available on request. 2 sample tested. 3 guaranteed by cmr test. 4 guaranteed by design.
op97 rev. g | page 4 of 16 v s = 15 v, v cm = 0 v, ?40c t a +85c for the op97e/op97f, unless otherwise noted. table 2. op97e op97f parameter symbol conditions min typ max min typ max unit input offset voltage v os 25 60 60 200 v average temperature tcv os s suffix 0.2 0.6 0.3 2.0 v/c coefficient of v os 0.3 input offset current i os 60 250 80 750 pa average temperature tci os 0.4 2.5 0.6 7.5 pa/c coefficient of i os input bias current i b 60 250 80 750 pa average temperature coefficient of i b tci b 0.4 2.5 0.6 7.5 pa/c large signal voltage gain a vo v o = 10 v; r l = 2 k 200 1000 150 1000 v/mv common-mode rejection cmr v cm = 13.5 v 108 128 108 128 db power supply rejection psr v s = 2.5 v to 20 v 108 126 108 128 db input voltage range 1 ivr 13.5 14.0 13.5 14.0 v output voltage swing v o r l = 10 k 13 14 13 14 v slew rate sr 0.05 0.15 0.05 0.15 v/s supply current i sy 400 800 400 800 a supply voltage v s operating range 2.5 15 20 2.5 15 20 v 1 guaranteed by cmr test.
op97 rev. g | page 5 of 16 absolute maximum ratings absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. table 3. parameter rating supply voltage 20 v input voltage 1 20 v differential input voltage 2 1 v differential input current 2 10 ma output short-circuit duration indefinite operating temperature range op97e, op97f (p, s) ?40c to +85c storage temperature range ?65c to +150c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c 1 for supply voltages less than 20 v, the absolute maximum input voltage is equal to the supply voltage. 2 the inputs of the op97 are protec ted by back-to-back diodes. current- limiting resistors are not used in orde r to achieve low noise. differential input voltages greater than 1 v cause excessive current to flow through the input protection diodes unless limiting resistance is used. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 4 . package type ja 1 jc unit 8-lead pdip (p suffix) 103 43 c/w 8-lead soic (s suffix) 158 43 c/w 1 ja is specified for worst-case mounting conditions, that is, ja is specified for device in socket for pdip package; ja is specified for device soldered to printed circuit board for soic package. esd caution
op97 rev. g | page 6 of 1 0 ?40 ?20 0 20 40 00299-00 6 typical performance characteristics 400 200 300 100 2 v s = 15v t a = 25c v cm = 0v number of units 60 ?20 0 ?40 ?60 ?75 ?50 ?25 0 25 100 7550 125 00299-005 20 40 t a = 25c v cm = 0v i b ? i b + i os temperature (c) input current (pa) 60 ?20 0 ?40 ?60 ?15 ?10 ?5 10 5 01 5 00299-006 20 40 i b ? i b + i os input offset voltage (v) 1894 units figure 2. typical distributi on of input offset voltage 400 200 300 100 3 figure 5. input bias, offset current vs. temperature 0 ?100 ?50 0 50 100 00299-00 v s = 15v t a = 25c v cm = 0v number of units 1920 units input bias current (pa) figure 3. typical distributi on of input bias current 500 400 200 300 100 4 t a = 25c v s = 15v common-mode voltage (v) input current (pa) 5 2 1 0 012 4 35 00299-007 3 4 t a = 25c v s = 15v v cm =0v figure 6. input bias, offset current vs. common-mode voltage 0 ?60 ?40 ?20 0 20 40 60 00299-00 input offset current (pa) number of units 1894 units v s = 15v t a = 25c v cm = 0v figure 4. typical distribution of input offset current j packages z, p packages time after power applied (minutes) devi a tion from fin a lvalue (v) figure 7. input offset voltage warmup drift
op97 rev. g | page 7 of 1 6 1000 100 10 1 1k 3k 10k 30k 100k 300k 1m 3m 10m effective offset voltage (v) 9-008 450 425 400 375 350 325 300 0 5 10 15 20 supply voltage (v) supply current (a) 00299-011 balanced or unbalanced v s = 15v v cm = 0v source resistance ( ? ) 0029 ?55c t a +125c t a = 25c t a = +125c no load t a = +25c t a = ?55c figure 8. effective offset voltage vs. source resistance 100 10 1 0.1 1k 10k 100k 1m 10m 100m effective offset voltage drift (v/c) 9-009 source resistance ( ? ) 0029 balanced or unbalanced v s = 15v v cm = 0v figure 9. effective tcv os vs. source resistance 20 15 10 5 0 ?5 ?10 short-circuit current (ma) figure 11. supply current vs. supply voltage 140 120 100 80 60 40 20 0 1 10 100 1k 10k 100k 1m frequency (hz) common-mode rejection (db) 00299-012 t a = 25c v s =15v v cm = 10v figure 12. common-mode rejection vs. frequency 140 120 100 80 60 40 power supply rejection (db) 20 1 0.1 10 100 1k 10k 100k 1m frequency (hz) 00299-013 ?15 ?20 0123 time from output short (minutes) 00299-010 t a = +25c t a = +25c t a = ?55c t a = 25c v s =15v v s =10v p-p t a = ?55c t a = +125c t a = +125c v s = 15v output shorted to ground figure 10. short-circuit current vs. time, temperature ?psr +psr figure 13. power supply rejection vs. frequency
op97 rev. g | page 8 of 16 10k 1k 100 12 51 02 0 open-loop gain (v/mv) 9-014 load resistance (k ? ) 0029 v s = 15v v o = 10v ?15 5 0 ?5 ?10 10 15 output voltage (v) differential input voltage (10v/div) 00299-017 r l = 10k ? v s = 15v v cm = 0v t a = +125c t a = +25c t a = ?55c t a = +125c t a = +25c t a = ?55c figure 14. open-loop gain vs. load resistance current noise density (fa/ hz) 1k 100 10 1k 100 10 1 1 1 10 100 1k 9-015 voltage noise density (nv/ hz) frequency (hz) 0029 t a = 25c v s = 2v to 20v current noise voltage noise 1/1 corner 2.5hz 1/1 corner 120hz figure 15. noise density vs. frequency 10 1 0.1 total noise density (v/ hz) 0.01 100 1k 10k 100k 1m 10m 100m source resistance ( ? ) 00299-016 t a = 25c v s = 2v to 20v 1khz 10hz resistor noise r r r s = 2r figure 16. total noise density vs. source resistance figure 17. open-loop gain linearity 35 30 25 20 15 10 5 0 10 100 1k 10k load resistance ( ? ) 00299-018 output swing (v p-p) t a = 25c v s = 15v a vcl = +1 1% thd f o = 1khz figure 18. maximum output swing vs. load resistance 35 30 25 20 15 10 5 output swing (v p-p) 0 100 1k 10k 100k frequency (hz) 00299-019 t a = 25c v s = 15v a vcl = +1 1% thd r l = 10k ? figure 19. maximum output swing vs. frequency
op97 rev. g | page 9 of 16 80 60 40 20 0 ?20 90 135 180 225 ?40 ?60 10m 100 1k 10k 100k 1m open-loop gain (db) phase shift (degrees) 9-020 frequency (hz) 0029 80 60 40 20 0 ?20 90 135 180 225 ?40 ?60 10m 100 1k 10k 100k 1m frequency (hz) open-loop gain (db) phase shift (degrees) 00299-023 gain phase t a = +125c t a = ?55c v s = 15v c l = 20pf r l = 1m ? t a = +125c t a = ?55c phase t a = ?55c t a = +125c gain t a = +125c t a = ?55c v s = 15v c l = 20pf r l = 1m ? figure 20. open-loop gain, phase vs. frequency (c oc = 0 pf) 10 1 0.1 0.01 0.001 0.0001 10 100 1k 10k 9-021 thd + n (%) frequency ( ? ) 0029 a vcl = 100 a vcl = 10 a vcl = 1 t a = 25c v s = 15v r l = 10k ? 1% thd v out = 3v rms figure 21. total harmonic distortion plus noise vs. frequency 70 60 50 40 30 20 overshoot (%) figure 23. open-loop gain, phase vs. frequency (c oc = 100 pf) 1 0.1 0.01 0.001 1 10 100 1k 10k overcompensation capacitor (pf) slew rate (v/s) 00299-024 r l = 10k ? v s = 15v c l = 100pf t a = +125c t a = ?55c figure 24. slew rate vs. overcompensation 1000 100 10 gain bandwidth (khz) 1 1 10 100 1k 10k overcompensation capacitor (pf) 00299-025 10 0 10 100 1k 10k load capacitance (pf) 00299-022 t a = 25c v s = 15v a vcl = +1 v out = 100mv p-p c oc = 0pf +edge ?edge figure 22. small signal overshoot vs. capacitive load t a = +125c t a = ?55c v s = 15v c l = 20pf r l = 1m ? a = 100 v figure 25. gain bandwidth product vs. overcompensation
op97 rev. g | page 10 of 16 1k 0.1 1 0.01 0.001 11 0 1 0 k 1k 100 100k 00299-028 10 100 80 60 40 20 0 ?20 90 135 180 225 ?40 ?60 10m 100 1k 10k 100k 1m open-loop gain (db) phase shift (degrees) 9-026 frequency (hz) 0029 t a = +25c t a = ?55c t a = ?55c t a = +125c t a = +125c gain phase v s = 15v c l = 20pf r l = 1m ? figure 26. open-loop gain, phase vs. frequency (c o c = 1000 pf) 80 60 40 20 0 ?20 90 135 180 225 open-loop gain (db) phase shift (degrees) ?40 ?60 10m 100 1k 10k 100k 1m frequency (hz) 00299-027 gain phase v s = 15v c l = 20pf r l = 1m ? t a = +25c t a = ?55c t a = ?55c t a = +125c t a = +125c figure 27. open-loop gain, phase vs. frequency (c oc = 10,000 pf) frequency (hz) output impedance ( ? ) t a = 25c v s =15v a vcl = 1000 a vcl = 1 figure 28. closed-loop outp ut resistance vs. frequency `
op97 rev. g | page 11 of 16 00299-029 application information the op97 is a low power alternative to the industry-standard precision op amp, the op07. the op97 can be substituted directly into op07, op77, ad725, and pm1012 sockets with improved performance and/or less power dissipation and can be inserted into sockets conforming to the 741 pinout if nulling circuitry is not used. generally, nulling circuitry used with earlier generation amplifiers is rendered superfluous by the extremely low offset voltage of the op97 and can be removed without compromising circuit performance. extremely low bias current over the full military temperature range makes the op97 attractive for use in sample-and-hold amplifiers, peak detectors, and log amplifiers that must operate over a wide temperature range. balancing input resistances is not necessary with the op97. offset voltage and tcv os are degraded only minimally by high source resistance, even when unbalanced. the input pins of the op97 are protected against large differential voltage by back-to-back diodes. current-limiting resistors are not used to maintain low noise performance. if differential voltages above 1 v are expected at the inputs, series resistors must be used to limit the current flow to a maximum of 10 ma. common-mode voltages at the inputs are not restricted and may vary over the full range of the supply voltages used. the op97 requires very little operating headroom about the supply rails and is specified for operation with supplies as low as 2 v. typically, the common-mode range extends to within 1 v of either rail. the output typically swings to within 1 v of the rails when using a 10 k load. offset nulling is achieved utilizing the same circuitry as an op07. a potentiometer between 5 k and 100 k is connected between pin 1 and pin 8 with the wiper connected to the positive supply. the trim range is between 300 v and 850 v, depending upon the internal trimming of the device. 8 4 7 5 3 6 2 1 op97 ?v c oc + v r pot = 5k ? to 100k ? figure 29. optional inpu t offset voltage nulling and overcompensation circuit
op97 rev. g | page 12 of 16 ac performance the ac characteristics of the op97 are highly stable over its full operating temperature range. unity-gain small-signal response is shown in figure 30 . extremely tolerant of capacitive loading on the output, the op97 displays excellent response even with 1000 pf loads (see figure 31 ). in large signal applications, the input protection diodes effectively short the input to the output during the transients if the amplifier is connected in the usual unity-gain configuration. the output enters short-circuit current limit, with the flow going through the protection diodes. improved large signal transient response is obtained by using a feedback resistor between the output and the inverting input. figure 32 shows the large-signal response of the op97 in unity- gain with a 10 k feedback resistor. the unity-gain follower circuit is shown in figure 33 . the overcompensation pin (pin 5) can be used to increase the phase margin of the op97 or to decrease gain bandwidth product at gains greater than 10. 00299-0 30 20mv 5s 100 90 10 0% figure 30. small signal transient response (c load = 100 pf, a vcl = 1) 00299-0 31 100 90 10 0% 20mv 5s 00299-032 100 90 10 0% 20s 2v 00299-033 figure 31. small-signal transient response (c load = 1000 pf, a vcl = 1) figure 32. large signal transient response (a vcl = 1) v out v in op97 10k? 2 3 6 00299-034 figure 33. unity-gain follower 100 90 10 0% 20mv 5s figure 34. small signal transient response with overcompensation (c load = 1000 pf, a vcl = 1, c oc = 220 pf)
op97 rev. g | page 13 of 16 00299-03 guarding and shielding to maintain the extremely high input impedances of the op97, care must be taken in circuit board layout and manufacturing. board surfaces must be kept scrupulously clean and free of moisture. conformal coating is recommended to provide a humidity barrier. even a clean pcb can have 100 pa of leakage currents between adjacent traces; therefore, use guard rings around the inputs. guard traces are operated at a voltage close to that on the inputs, so that leakage currents are minimal. in noninverting applications, connect the guard ring to the common- mode voltage at the inverting input (pin 2). in inverting appli- cations, both inputs remain at ground, so that the guard trace should be grounded. make guard traces on both sides of the circuit board. high impedance circuitry is extremely susceptible to rf pickup, line frequency hum, and radiated noise from switching power supplies. enclosing sensitive analog sections within grounded shields is generally necessary to prevent excessive noise pickup. twisted-pair cable aid in rejection of line frequency hum. 5 v out op97 2 3 6 i o i o 30pf ad7548 r fb digital inputs 00299-036 figure 35. dac output amplifier the op97 is an excellent choice as an output amplifier for higher resolution cmos dacs. its tightly trimmed offset voltage and minimal bias current result in virtually no degradation of linearity, even over wide temperature ranges. figure 36 shows a versatile monitor circuit that can typically sense current at any point between the 15 v supplies. this makes it ideal for sensing current in applications such as full bridge drivers where bidirectional current is associated with large common-mode voltage changes. the 114 db cmrr of the op97 makes the contribution of the amplifier to common- mode error negligible, leaving only the error due to the resistor ratio inequality. ideally, r2/r4 = r3/r5. v out r l i l 2 3 6 7 4 r3 10k? r2 10k ? r4 10k? r5 10k ? r1 10k ? v 1 op97 +15v ?15v 00299-037 unity-gain followe figure 36. current monitor r noninverting amplifie r inverting amplifier op97 2 3 6 op97 2 3 6 op97 2 3 6 pdip bottom view 81 figure 37. guard ring layout and connections
op97 rev. g | page 14 of 16 the digitally programmable gain amplifier shown in figure 38 has 12-bit gain resolution with 10-bit gain linearity over the range of ?1 to ?1024. the low bias current of the op97 main- tains this linearity, while c1 limits the noise voltage bandwidth, allowing accurate measurement down to microvolt levels. table 5 . digital in gain (a v ) 4095 ?1.00024 2048 ?2 1024 ?4 512 ?8 256 ?16 128 ?32 64 ?64 32 ?128 16 ?256 8 ?512 4 ?1024 2 ?2048 1 ?4096 0 open loop many high speed amplifiers suffer from less-than-perfect low frequency performance. a combination amplifier consisting of a high precision, slow device like the op97 and a faster device such as the ad8610 results in uniformly accurate performance from dc to the high frequency limit of the ad8610, which has a gain- bandwidth product of 25 mhz. the circuit shown in figure 39 accomplishes this, with the ad8610 providing high frequency amplification and the op97 operating on low frequency signals and providing offset correction. offset voltage and drift of the circuit are controlled by the op97. 00299-038 v out 2 3 6 ad7541a i out2 i out1 r fb v ref 18 1 2 3 17 16 +15v ?15v 0.1f 0.1f c1 220pf v in 2.5mv to 10v range depending on gain setting +15 v op97 0.1f figure 38. precision programmable gain amplifier 00299-039 2 3 6 2 3 6 5pf v out ad8610 op97 0.1f 0.1f 10k? 10k? 1f r1 2k? r2 20k? v in 5 a v = ? r2 r1 figure 39. combination high speed, precision amplifier 00299-040 100 90 10 0% 1v 5v 2s figure 40. combination amplifier transient response
op97 rev. g | page 15 of 16 compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) outline dimensions seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 41. 8-lead plastic dual in-line package [pdip] p-suffix (n-8) dimensions shown in inches and (millimeters) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 42. 8-lead standard small outline package [soic_n] narrow body s-suffix (r-8) dimensions shown in millimeters and (inches)
op97 rev. g | page 16 of 16 ordering guide model temperature range package description package option op97ep C40c to +85c 8-lead pdip n-8 op97epz 1 C40c to +85c 8-lead pdip n-8 op97fp ?40c to +85c 8-lead pdip n-8 op97fpz 1 ?40c to +85c 8-lead pdip n-8 op97fs ?40c to +85c 8-lead soic_n r-8 op97fs-reel ?40c to +85c 8-lead soic_n r-8 op97fs-reel7 ?40c to +85c 8-lead soic_n r-8 op97fsz 1 ?40c to +85c 8-lead soic_n r-8 op97fsz-reel 1 ?40c to +85c 8-lead soic_n r-8 OP97FSZ-REEL7 1 ?40c to +85c 8-lead soic_n r-8 1 z = rohs compliant part. ?1997C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00299-0-3/09(g)

▲Up To Search▲

Price & Availability of OP97FSZ-REEL7

	To Download OP97FSZ-REEL7 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .